HSA enabled APU “Kaveri” by AMD

HSA enabled APU

 Once again the increase in available transistors provided the opportunity to integrate CPU with GPU into a single device called as “APU”. The close proximity of these two processor types offered the ability to more tightly couple the memory system to enable direct sharing of data structures. Faced with limitations in silicon scaling (maintaining Moore’s Law) and the driving need to improve performance and efficiency, the electronics industry is banding together to change the very nature of computing. This is the transition to “heterogeneous computing” where the various execution units are more tightly integrated and share system responsibility and resources. The critical part of this is elevating the other programmable execution units like the GPU to the same level of the CPU for memory access, queuing, and execution. In other words, rather than having a CPU and various co-processors, these various processor elements can be referred to in combination as “Compute Cores.” Kaveri is the first HSA enabled APU which is based on the concept of Compute cores.

 

THE COMPUTE CORE NOMENCLATURE


        Beginning in 2014, products from various semiconductor companies, particularly those that are members of the HSA Foundation, will begin introducing heterogeneous devices. To assist in evaluating these new processor solutions, AMD is adopting the Compute Core nomenclature as a designation for processors that meet the HSA specifications and as a general method of comparing these solutions. With the first generation of heterogeneous processors based on the architecture of the APU codenamed “Kaveri” the first  HSA enabled APU , AMD will begin designating the number of compute cores in the following manner.

HSA enabled APU

AMD A10-7850K APU with Radeon™ R7 graphics 12 Compute Cores (4 CPU + 8 GPU)

HSA enabled APU

HSA enabled APU

AMD’s Heterogeneous platform HSA enabled APU “Kaveri” represents the latest in AMD’s processor technology and first heterogeneous computing platform by combining up to four high-performance Steamroller CPU cores with eight Graphics Core Next (GCN) GPU cores. AMD’s Steamroller compute cores are highly optimized x86 cores for parallel instruction execution. The cores are paired together in modules and feature independent instruction decoders, enhanced branch prediction units, redesigned caches, and ALUs. AMD’s GCN compute units are grouped together by a dedicated scheduler that feeds four 16-wide SIMD vector processors, a scalar processor, local data registers and data share memory, a branch & message processor, 16 texture fetch or load/store units, four texture filter units, and a texture cache. Some of these characteristics are very similar to how CPU cores are grouped together, and offer similarities of being able to independently execute work-groups in parallel. As a result, each one of these GPU compute units operates in a manner comparable to a CPU core. However, unlike a CPU core which is designed and optimized to handle serial tasks, the “GPU core” is designed and optimized to handle parallel tasks. “Kaveri” HSA enabled APU combines these CPU and GPU technologies with an integrated hardware scheduler and the supporting libraries and tools for the industry’s first heterogeneous computing platform as defined by the upcoming HSA Foundation specification.

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