Ambidextrous Computing from AMD and ARM

Ambidextrous Computing

Now in general, Ambidextrous means using the good qualities of both left and right side of Brain. “Ambidextrous computing”.

Ambidextrous Computing

On 5th MAY 2014, AMD announced computing solutions that harness the best characteristics of both x86 and ARM ecosystem. Now the main focus is to announce the AMD’s 64-bit architecture license for the development of custom high performance cores for high growth markets. It also provides a glimpse about this computing and graphics performance using a shared, flexible infrastructure for embedded, client, server and semi-custom solutions.

With 64 bit ARM architecture and X86 architecture paired with world class graphics which will provide a efficient way of computing.

Ambidextrous Computing
Ambidextrous computing roadmap

            Project Skybridge :- This design Framework will feature 20 nanometer APUs(Accelerated Processing Unit ) and SOCs(System On Chip) that are expected to be the world’s first pin compatible ARM and x86 processor. The 64-bit ARM variant of project skybridge will be based on the AMD cortex A-57 core and is first Heterogeneous System Architecture(“HSA“) platform for android and x86 variant will feature next generation”puma+” cores. The “Project SkyBridge” family will feature full SoC integration, AMD Graphics Core Next technology, HSA, and AMD Secure Technology via a dedicated Platform Security Processor (PSP).

Ambidextrous Computing

                    K12 :-   A new high-performance, low-power ARM-based core that takes deep advantage of AMD’s ARM architectural license, extensive 64-bit design expertise, and a core development team led by Chief CPU Architect​ Jim Keller. The first products based on “K12” are planned for introduction in 2016.


                                       As 64-bit ARM and x86 architecture provides the 32-bit and 64-bit simultaneous computing. ARM processor based on RISC architecture and x86 architecture based on CISC architecture. They are trying to integerate this both on a single silicon chip die.Excited to see whether this integeration will take the computing to the next level or not?

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